Associate Professor Peter Sutton's research interests are in Engineering Education, Embedded Computing Systems and Reconfigurable Computing
Associate Professor Peter Sutton has worked, studied and taught in the area of computer systems since completing his undergraduate studies in 1990. His particular research interests are in Engineering Education, Embedded System Design Software, Electronic Design Automation, and Reconfigurable Computing Systems.
Conference Publication: An evidence-based approach to designing a first year Electrical Engineering Course
Bergmann, Neil, O'Shea, Peter, Terrill, Philip and Sutton, Peter (2013). An evidence-based approach to designing a first year Electrical Engineering Course. In: Charles Lemckert, Graham Jenkins and Susan Lang-Lemckert, Proceedings of the 24th Annual Conference of the Australasian Association for Engineering Education: AAEE2013 Proceedings. AAEE 2013: 24th Annual Conference of the Australasian Association for Engineering Education, Gold Coast, QLD, Australia, (). 8-11 December 2013.
Conference Publication: Using quicksand to improve debugging practice in post-novice level students
Fenwick, Joel and Sutton, Peter (2012). Using quicksand to improve debugging practice in post-novice level students. In: Michael de Raadt and Angela Carbone, Proceedings of the Fourteenth Australasian Computing Education Conference (ACE2012), Melbourne, Australia. Fourteenth Australasian Computing Education Conference (ACE2012), Melbourne, Australia, (141-146). 30 January - 2 February 2012.
Conference Publication: A unified emulation/simulation environment for reconfigurable system-on-chip development
Crosthwaite, Peter, Williams, John and Sutton, Peter (2011). A unified emulation/simulation environment for reconfigurable system-on-chip development. In: 2011 International Conference on Field-Programmable Technology. 2011 International Conference on Field-Programmable Technology, New Dehli, India, (1-8). 12-14 December 2011. doi:10.1109/FPT.2011.6132690
(2008–2009) ALTC Priority Projects
Reconfigurable System-on-Chip for Computer Network Appliances
(2004–2007) ARC Linkage Projects
Efficient Hardware Compilation for Reconfigurable Computing.
(2000) UQ Early Career Researcher
Dynamic cache switching: Developing configurable caches for use in softcore processors
(2010) Doctor Philosophy
A New Architecture for Virtual Private Networking with Reconfigurable System-on-Chip Technology
(2007) Doctor Philosophy
CODE COMPRESSION OPTIMISATION FOR VLIW PROCESSORS
(2007) Doctor Philosophy
Engineering Education
I'm interested in many aspects of Engineering and Computer Science Education, particularly technology-enhanced learning. Contact me to discuss ideas!
FPGA implementations of neural networks - A survey of a decade of progress
Zhu, Jihan and Sutton, Peter (2003) FPGA implementations of neural networks - A survey of a decade of progress. Lecture Notes in Computer Science (including subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics), 2778 1062-1066.
An evaluation of active lecturing in a computer networks course
Sutton, P. R. (2003) An evaluation of active lecturing in a computer networks course. World Transactions on Engineering and Technology Education, 2 2: 185-188.
An evidence-based approach to designing a first year Electrical Engineering Course
Bergmann, Neil, O'Shea, Peter, Terrill, Philip and Sutton, Peter (2013). An evidence-based approach to designing a first year Electrical Engineering Course. In: Charles Lemckert, Graham Jenkins and Susan Lang-Lemckert, Proceedings of the 24th Annual Conference of the Australasian Association for Engineering Education: AAEE2013 Proceedings. AAEE 2013: 24th Annual Conference of the Australasian Association for Engineering Education, Gold Coast, QLD, Australia, (). 8-11 December 2013.
Using quicksand to improve debugging practice in post-novice level students
Fenwick, Joel and Sutton, Peter (2012). Using quicksand to improve debugging practice in post-novice level students. In: Michael de Raadt and Angela Carbone, Proceedings of the Fourteenth Australasian Computing Education Conference (ACE2012), Melbourne, Australia. Fourteenth Australasian Computing Education Conference (ACE2012), Melbourne, Australia, (141-146). 30 January - 2 February 2012.
A unified emulation/simulation environment for reconfigurable system-on-chip development
Crosthwaite, Peter, Williams, John and Sutton, Peter (2011). A unified emulation/simulation environment for reconfigurable system-on-chip development. In: 2011 International Conference on Field-Programmable Technology. 2011 International Conference on Field-Programmable Technology, New Dehli, India, (1-8). 12-14 December 2011. doi:10.1109/FPT.2011.6132690
Design exploration for FPGA-based multiprocessor architecture: JPEG encoding case study
Wu, Jason, Williams, John, Bergmann, Neil and Sutton, Peter (2009). Design exploration for FPGA-based multiprocessor architecture: JPEG encoding case study. In: Proceedings of the 2009 17th Ieee Symposium On Field Programmable Custom Computing Machines. 17th IEEE Symposium on Field Programmable Custom Computing Machines, Napa, California, (299-302). 5-7 April 2009. doi:10.1109/FCCM.2009.7
Profile driven data-dependency analysis for improved high level language hardware synthesis
Crosthwaite, Peter, Williams, John and Sutton, Peter (2009). Profile driven data-dependency analysis for improved high level language hardware synthesis. In: Neil Bergmann, Oliver Diessel and Lesley Shannon, Proceedings of the 2009 International Conference on Field-Programmable Technology. 2009 International Conference on Field-Programmable Technology, Sydney , Australia, (207-214). 9-11 December 2009. doi:10.1109/FPT.2009.5377672
Shield, John, Sutton, Peter and Williams, John (2009). Targeted configurable caches. In: Neil Bergmann, Oliver Diessel and Lesley Shannon, Proceedings of the 2009 International Conference on Field-Programmable Technology. 8th International Conference on Field-Programmable Technology, Sydney , Australia, (320-323). 9-11 December 2009. doi:10.1109/FPT.2009.5377674
Analysis of kernel effects on optimisation mismatch in cache reconfiguration
Shield, J., Sutton, P. and Machanick, P. (2007). Analysis of kernel effects on optimisation mismatch in cache reconfiguration. In: Bertels, K., W. Najjar, A. Van Genderen and S. Vassiliadis, Proceedings of the 2007 International Conference on Field Programmable Logic and Applications (FPL 2007). 2007 International Conference on Field Programmable Logic and Applications (FPL 2007), Amsterdam, The Netherlands, (625-628). 27th - 29th August, 2007. doi:10.1109/FPL.2007.4380732
Dynamic cache switching in reconfigurable embedded systems
Shield, J, Sutton, P. and Machanick, P. (2007). Dynamic cache switching in reconfigurable embedded systems. In: K. Bertels, W. Najjar, A. Van Genderen and S. Vassiliadis, Proceedings of the 2007 International Conference on Field Programmable Logic and Applications (FPL 2007). 2007 International Conference on Field Programmable Logic and Applications (FPL 2007), Amsterdam, The Netherlands, (111-116). 27th - 29th August, 2007. doi:10.1109/FPL.2007.4380634
Wee, C.M., Sutton, P.R. and Bergmann, N.W. (2007). Operating system integration and performance of a multi stream cipher architecture for reconfigurable system-on-chip. In: Poek, K.L. and Buell, D., Proceedings IEEE Symposium on Field-Programmable Custom Computing Machines. 15th Annual IEEE Symposium on Field-Programmable Custom Computing Machines (FCCM 2007), California, USA, (283-284). 23-25 April, 2007. doi:10.1109/FCCM.2007.19
Context-enhanced authentication for infrastructureless network environments
Wishart, R. G., Indulska, J., Portmann, M. and Sutton, P. R. (2006). Context-enhanced authentication for infrastructureless network environments. In: J. Ma, H. Jin, L.T.Yang and J.J.P. Tsai, Ubiquitous Intelligence and Computing, Third International Conference, UIC 2006 Proceedings. Third International Conference on Ubiquitous Intelligence and Computing, Wuhan, China, (924-935). 3-6 September, 2006.
Multi stream cipher architecture for reconfigurable system-on-chip
Wee, C. M., Sutton, P R, Bergmann, N W and Williams, J A (2006). Multi stream cipher architecture for reconfigurable system-on-chip. In: A. Koch, P. Leong and E. Boemo, Proceedings, 2006 International Conference on Field Programmable Logic and Applications. 2006 International Conference on Field Programmable Logic and Applications, Madrid, Spain, (769-772). 28-30 August, 2006. doi:10.1109/FPL.2006.311310
VPN acceleration using reconfigurable system-on-chip technology
Wee, C. M., Sutton, P R, Bergmann, N W and Williams, J A (2006). VPN acceleration using reconfigurable system-on-chip technology. In: K. Pocek and D. Buell, IEEE Symposium on Field-Programmable Custom Computing Machines. 14th Annual IEEE Symposim on Field-Programmable Custom Computing Machines, Napa, California, (281-282). 24-26 April, 2006. doi:10.1109/FCCM.2006.72
A post-compilation register reassignment technique for improving hamming distance code compression
Ros, Montserrat and Sutton, Peter (2005). A post-compilation register reassignment technique for improving hamming distance code compression. In: Proceedings of the 2005 international conference on Compilers, architectures and synthesis for embedded systems. CASES 2005: International Conference on Compilers, Architecture, and Synthesis for Embedded Systems, San Francisco, CA, U.S.A., (97-104). 24-27 September 2005. doi:10.1145/1086297.1086311
An FPGA network architecture for accelerating 3DES - CBC
Wee, C. M., Sutton, P. R. and Bergmann, N. W. (2005). An FPGA network architecture for accelerating 3DES - CBC. In: T. Rissa, S. Wilton and P. Leong, IEEE International Conference on Field Programmable Logic and Applications (FPL). 15th International Conference on Field Programmable Logic and Applications (FPL), Tampere, Finland, (654-657). 24-26 August 2005. doi:10.1109/FPL.2005.1515806
A hamming distance based VLIW/EPIC code compression technique
Ros, M. B. and Sutton, P. R. (2004). A hamming distance based VLIW/EPIC code compression technique. In: Mary Jane Irwin, Wei Zhao, Luciano Lavagno and Scott A. Mahlke, CASES 2004: International Conference on Compilers, Architecture and Synthesis for Embedded Systems. The International Conference on Compilers, Architecture and Synthesis for Embedded Systems (CASES 2004), Washington, U.S.A., (132-139). 22-25 September 2004.
A hamming distance based VLIW/EPIC code compression technique
Ros, Montserrat and Sutton, Peter (2004). A hamming distance based VLIW/EPIC code compression technique. In: CASES 2004: International Conference on Compilers, Architecture, and Synthesis for Embedded Systems, Washington, DC United States, (133-139). 22 - 25 September 2004.
Architectural tradeoffs in reconfigurable computer for Monte Carlo based simulation of sintering
Postula, A. J., Sutton, P. R., Harrington, D. and Sutton, R. A. (2004). Architectural tradeoffs in reconfigurable computer for Monte Carlo based simulation of sintering. In: E, Grosspietsch and K. Klockner, Proceedings of the Work in Progress Session. The Work in Progress Session, Rennes, France, (11-12). 1-4 September, 2004.
Code compression based on operand-factorization for VLIW processors
Ros, M. B. and Sutton, P. R. (2004). Code compression based on operand-factorization for VLIW processors. In: J. Storer and M. Cohn, Proceedings of the Data Compression Conference 2004 (DCC 2004). The Data Compression Conference 2004 (DCC 2004), Snowbird, Utah, U.S.A., (559-559). 23-25 March 2004. doi:10.1109/DCC.2004.1281535
Memory specification for reconfigurable computing synthesis tools
Xue, J.K. and Sutton, P. R. (2004). Memory specification for reconfigurable computing synthesis tools. In: O. Diessel and J. Williams, Proceedings of the 2004 IEEE International Conference on Field-Programmable Technology. The 2004 IEEE International Conference on Field-Programmable Technology, Brisbane, (417-420). 6-8 December, 2004.
Partial character decoding for improved regular expression matching in FPGAs
Sutton, P. R. (2004). Partial character decoding for improved regular expression matching in FPGAs. In: O. Diessel and J. Williams, Proceedings of the 2004 IEEE International Conference on Field-Programmable Technology. The 2004 IEEE International Conference on Field-Programmable Technology, Brisbane, (25-32). 6-8 December, 2004.
An FPGA Implementation of Kak's Instantaneously-Trained, Fast-Classification Neural Networks
Zhu, J. and Sutton, P. R. (2003). An FPGA Implementation of Kak's Instantaneously-Trained, Fast-Classification Neural Networks. In: K. Asada and M. Fujita, Proceedings of the 2003 IEEE International Conference on Field-Programmable Technology (FPT). The 2003 IEEE International Conference on Field-Programmable Technology (FPT), Tokyo, Japan, (126-133). 15-17 December, 2003. doi:10.1109/FPT.2003.1275740
Compiler Optimization and Ordering Effects on VLIW Code Compression
Montserrat, Ros and Sutton, Peter (2003). Compiler Optimization and Ordering Effects on VLIW Code Compression. In: J. Moreno and P. Murthy, Proceedings for the CASES 2003: International Conference on Compilers, Architecture and Synthesis for Embedded Systems. International Conference on Compilers, Architecture and Synthesis for Embedded Systems, San Jose, CA, USA, (95-103). Oct 30 - Nov 1, 2003.
FPGA Implementation of Neural Networks - A Survey of a Decade of Progress
Zhu, Jihan and Sutton, Peter (2003). FPGA Implementation of Neural Networks - A Survey of a Decade of Progress. In: Cheung, Peter Y. K., Constantinides, George A. and de Sousa, Jose T., 13th International Conference on Field-Programmable Logic and Applications (FPL 2003), Lisbon, Portugal, (1062-1066). September.
FPGA implementations of neural networks: A survey of a decade of progress
Zhu, J. and Sutton, P. R. (2003). FPGA implementations of neural networks: A survey of a decade of progress. In: P. Cheung, G. Constantinides and J. de Sousa, Proceedings of the Thirteenth International Conference Field-Programmable Logic and Applications. The Thirteenth International Conference on Field-Programmable Logic and Applications, Lisbon, Portugal, (1062-1066). 1-3 September, 2003.
Location management in pervasive systems
Indulska, J. and Sutton, P. R. (2003). Location management in pervasive systems. In: C. Johnson, P. Montague and C. Steketee, ACSW Frontiers 2003: Proceedings of the Australian Information Security Workshop and the Workshop on Wearable, Invisible, Context-Aware, Ambient, Pervasive and Ubiquitous Computing. The Australian Information Security Workshop and the Workshop on Wearable, Invisible, Context-Aware, Ambient, Pervasive and Ubiquitous Computing, Adelaide, (143-151). 4-7 February, 2003.
Sutton, P. R., Brereton, M. F., Heyer, C. M. and MacColl, I. D. (2002). Ambient interaction framework: Software infrastructure for the rapid development of pervasive computing environments. In: Ubiquitous Computing Trends: Tricks and Traps. Inaugural Asia Pacific Forum on Pervasive Computing, Adelaide, (1-8). 31 October - 1 November, 2002.
JPG: A partial bitstream generation tool to support partial reconfiguration in virtex FPGAs
Raghavan, A. and Sutton, P. R. (2002). JPG: A partial bitstream generation tool to support partial reconfiguration in virtex FPGAs. In: A. Ferreira and A. Gottlieb, Proceedings of the Internationall Parallel and Distributed Processing Symposium. 16th International Parallel and Distributed Processing Symposium, IPDPS 2002, Ft Lauderdale, Florida, (155-160). 15-19 April, 2002. doi:10.1109/IPDPS.2002.1016552
A flexible multiplacation unit for an FPGA logic block
Rajagopalan, K. and Sutton, P. R. (2001). A flexible multiplacation unit for an FPGA logic block. In: D. Skellern and G. Hellestrand, Proceedings of ISCAS 2001. The IEEE International Symposium on Circuits and Systems, Sydney, (546-549). 6-9 May, 2001.
Rajagopalan, K. and Sutton, P. R. (2001). An FPGA architecture with configurable multiplier and carry units for improved arithmetic performance. In: Proceedings of FPGA '01. Ninth International Symposium on Field Programmable Gate Arras, Monterey, California, (225-225). 11-13 February, 2001.
An innovation design and studio-based CS degree
Docherty, M. J., Sutton, P. R., Brereton, M. F. and Kaplan, S. M. (2001). An innovation design and studio-based CS degree. In: B. Klein, The Proceedings of the Thirty Second SIGCSE Technical Symposium on Computer Science Education. SIGCSE 2001, Charlotte, North Carolina, (233-237). 21-25 February 2001. doi:10.1145/364447.364591
Johnson, D. M., Sutton, P. R. and Harris, N. (2001). Extreme programming requires extremely effective communication: teaching effective communication skills to students in an IT degree. In: G. Kennedy, M. Keppell, C. McNaught and T. Petrovic, Meeting at the Crossroads: ASCILITE 2001. ASCILITE 2001, University of Melbourne, (81-84). 9-12 December 2001.
Supporting disconnectedness: Transparent information delivery for mobile and invisible computing
Sutton, P. R., Arkins, R. G. and Segall, B. (2001). Supporting disconnectedness: Transparent information delivery for mobile and invisible computing. In: R. Buyya, G. Mohay and P. Roe, Proceedings of the First IEEE/ACM International Symposium on Cluster Computing and the Grid. First IEEE/ACM International Symposium on Cluster Computing and the Grid, Brisbane, (277-285). 15-18 May, 2001. doi:10.1109/CCGRID.2001.923204
Face-to-face vs CMC: Student communication in a technologically rich learning environment
Johnson, D. M., Sutton, P. R. and Poon, J. (2000). Face-to-face vs CMC: Student communication in a technologically rich learning environment. In: R. Sims, M. O'Reilly and S.Sawkins, Proceedings of the 17th Annual Conference of the Australasian Society for Computer in Learning in Tertiary Education: ASCILITE 2000. ASCILITE 2000, Coffs Harbour, (509-520). 9-14 December 2000.
The information environments program: A new design based IT degree
Docherty, M., Sutton, P. R., Brereton, M. F., Kaplan, S. M. and Brown, A. (2000). The information environments program: A new design based IT degree. In: AE Ellis, The Proceedings of the Fourth Australasian Computing Education Conference: ACE 2000. ACE 2000, Melbourne, (64-70). 4-6 December 2000.
Rapid prototyping and implementation method for systolic array digital signal processors
Bergmann N., Wong H. and Sutton P. (1991). Rapid prototyping and implementation method for systolic array digital signal processors. In: Tenth Microelectronic Conference, Melbourne, Aust, (91-93). June 24, 1991-June 25, 1991.
(2008–2009) ALTC Priority Projects
Reconfigurable System-on-Chip for Computer Network Appliances
(2004–2007) ARC Linkage Projects
Efficient Hardware Compilation for Reconfigurable Computing.
(2000) UQ Early Career Researcher
Dynamic cache switching: Developing configurable caches for use in softcore processors
(2010) Doctor Philosophy — Principal Advisor
A New Architecture for Virtual Private Networking with Reconfigurable System-on-Chip Technology
(2007) Doctor Philosophy — Principal Advisor
Other advisors:
CODE COMPRESSION OPTIMISATION FOR VLIW PROCESSORS
(2007) Doctor Philosophy — Principal Advisor
PLACE AND ROUTE FOR PARTIAL FPGA RECONFIGURATION
(2004) Master Engineering Sc — Principal Advisor
RTOS Speedup Methods for Hard Real-time Embedded Systems on FPGA
(2013) Doctor Philosophy — Associate Advisor
Design Framework for FPGA-based Multiprocessor
(2012) Doctor Philosophy — Associate Advisor
Other advisors:
Designing context-aware applications for complex environments
(2010) Doctor Philosophy — Associate Advisor
A participatory design approach in the engineering of ubiquitous computing systems
(2009) Doctor Philosophy — Associate Advisor
(2008) Doctor Philosophy — Associate Advisor
Estimation of Analog Layout Parasitics with Parameterized Polygons
(2008) Doctor Philosophy — Associate Advisor
AN INTERFACE METHODOLOGY FOR RECONFIGURABLE FPGA PERIPHERALS - A FEATURE-BASED APPROACH.
(2006) Master Philosophy — Associate Advisor
HARDWARE ACCELERATION OF SECURITY APPLICATION USING RECONFIGURABLE SYSTEM-ON-CHIP
(2006) Master Philosophy — Associate Advisor
RECONFIGURABLE COMPUTING FOR REAL-TIME APPLICATIONS
(2006) Doctor Philosophy — Associate Advisor
MULTIPLE CONNECTION BASED TCP FOR A WIDE RANGE OF NETWORKS
(2005) Doctor Philosophy — Associate Advisor
Note for students: The possible research projects listed on this page may not be comprehensive or up to date. Always feel free to contact the staff for more information, and also with your own research ideas.
Engineering Education
I'm interested in many aspects of Engineering and Computer Science Education, particularly technology-enhanced learning. Contact me to discuss ideas!